國(guó)外電子電氣經(jīng)典教材系列：模擬CMOS集成電路設(shè)計(jì)（英文版）簡(jiǎn)介，目錄書摘
2020-01-16 16:28
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作者：京東
國(guó)外電子電氣經(jīng)典教材系列：模擬CMOS集成電路設(shè)計(jì)（英文版）
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編輯推薦: 《國(guó)外電子電氣經(jīng)典教材系列：模擬CMOS集成電路設(shè)計(jì)（英文版）》特色：
·涵蓋模擬CMOS集成電路分析、設(shè)計(jì)的完整流程，是學(xué)習(xí)模擬電路設(shè)計(jì)的入門寶典。
·將電路的基本概念、設(shè)計(jì)原理與實(shí)際工程應(yīng)用關(guān)聯(lián)，理論與實(shí)際結(jié)合，激發(fā)讀者的興趣。
·在闡述各種模擬電路的改進(jìn)和新電路結(jié)構(gòu)的產(chǎn)生時(shí)，著重觀察和分析，不斷地提出問題和解決問題。
·通過學(xué)習(xí)本書對(duì)電路的嚴(yán)謹(jǐn)分析，逐步掌握用CMOS工藝技術(shù)來設(shè)計(jì)模擬電路。
·涵蓋模擬CMOS集成電路分析、設(shè)計(jì)的完整流程，是學(xué)習(xí)模擬電路設(shè)計(jì)的入門寶典。
·將電路的基本概念、設(shè)計(jì)原理與實(shí)際工程應(yīng)用關(guān)聯(lián)，理論與實(shí)際結(jié)合，激發(fā)讀者的興趣。
·在闡述各種模擬電路的改進(jìn)和新電路結(jié)構(gòu)的產(chǎn)生時(shí)，著重觀察和分析，不斷地提出問題和解決問題。
·通過學(xué)習(xí)本書對(duì)電路的嚴(yán)謹(jǐn)分析，逐步掌握用CMOS工藝技術(shù)來設(shè)計(jì)模擬電路。
內(nèi)容簡(jiǎn)介: 《國(guó)外電子電氣經(jīng)典教材系列：模擬CMOS集成電路設(shè)計(jì)（英文版）》介紹模擬CMOS集成電路的分析與設(shè)計(jì)，著重講解技術(shù)的進(jìn)展和設(shè)計(jì)實(shí)例，從MOSFET器件的基本物理特性開始，逐章分析CMOS放大單元電路、差分放大器、頻率響應(yīng)、噪聲、反饋放大器與穩(wěn)定性、運(yùn)算放大器、電壓基準(zhǔn)源與電流基準(zhǔn)源、離散時(shí)間系統(tǒng)、差分電路及反饋系統(tǒng)中的非線性、振蕩器和鎖相環(huán)等基礎(chǔ)模擬電路的分析與設(shè)計(jì)。
《國(guó)外電子電氣經(jīng)典教材系列：模擬CMOS集成電路設(shè)計(jì)（英文版）》還介紹了集成電路的基本制造工藝、版圖和封裝設(shè)計(jì)的基本原則。本書自出版以來得到了國(guó)內(nèi)外讀者的好評(píng)和青睞，被許多國(guó)際知名大學(xué)選為教科書。同時(shí)，由于原著者在世界知名公司的豐富研究經(jīng)歷，使本書也非常適合作為CMOS模擬集成電路設(shè)計(jì)或相關(guān)領(lǐng)域的研究人員和工程技術(shù)人員的參考書。
《國(guó)外電子電氣經(jīng)典教材系列：模擬CMOS集成電路設(shè)計(jì)（英文版）》還介紹了集成電路的基本制造工藝、版圖和封裝設(shè)計(jì)的基本原則。本書自出版以來得到了國(guó)內(nèi)外讀者的好評(píng)和青睞，被許多國(guó)際知名大學(xué)選為教科書。同時(shí)，由于原著者在世界知名公司的豐富研究經(jīng)歷，使本書也非常適合作為CMOS模擬集成電路設(shè)計(jì)或相關(guān)領(lǐng)域的研究人員和工程技術(shù)人員的參考書。
作者簡(jiǎn)介: Behzad Razavi，分別于1988年和1992年在斯坦福大學(xué)電氣工程系獲得理學(xué)碩士和博士學(xué)位。他曾在AT&T貝爾實(shí)驗(yàn)室工作，隨后又受聘于Hewlett-Packard實(shí)驗(yàn)室。他于1992年～1994年在普林斯頓大學(xué)（新澤西州普林斯頓）及1995年在斯坦福大學(xué)任副教授。1996年9月，他成為加州大學(xué)洛杉磯分校的電氣工程系副教授，隨后晉升為教授。拉扎維教授是VLSI電路專題討論會(huì)的技術(shù)程序委員會(huì)和國(guó)際固體電子協(xié)會(huì)（ISSCC）的成員。擔(dān)任模擬小組委員會(huì)的主席。
目錄:About the Author
Preface
Acknowledgments
1 Introduction to Analog Design
1.1 Why Analog?
1.2 Why Integrated?
1.3 Why CMOS?
1.4 Why This Book?
1.5 General Concepts
1.5.1 Levels of Abstraction
1.5.2 Robust Analog Design
2 Basic MOS Device Physics
2.1 General Considerations
2.1.1 MOSFET as a Switch
2.1.2 MOSFET Structure
2.1.3 MOS Symbols
2.2 MOS I/V Characteristics
2.2.1 Threshold Voltage
2.2.2 Derivation of I/V Characteristics
2.3 Second-Order Effects
2.4 MOS Device Models
2.4.1 MOS Device Layout
2.4.2 MOS Device Capacitances
2.4.3 MOS Small-Signal Model
2.4.4 MOS SPICE models
2.4.5 NMOS versus PMOS Devices
2.4.6 Long-Channel versus Short-Channel Devices
3 Single-Stage Amplifiers
3.1 Basic Concepts
3.2 Common-Source Stage
3.2.1 Common-Source Stage with Resistive Load
3.2.2 CS Stage with Diode-Connected Load
3.2.3 CS Stage with Current-Source Load
3.2.4 CS Stage with Triode Load
3.2.5 CS Stage with Source Degeneration
3.3 Source Follower
3.4 Common-Gate Stage
3.5 Cascode Stage
3.5.1 Folded Cascode
3.6 Choice of Device Models
4 Differential Amplifiers
4.1 Single-Ended and Differential Operation
4.2 Basic Differential Pair
4.2.1 Qualitative Analysis
4.2.2 Quantitative Analysis
4.3 Common-Mode Response
4.4 Differential Pair with MOS Loads
4.5 Gilbert Cell
5 Passive and Active Current Mirrors
5.1 Basic Current Mirrors
5.2 Cascode Current Mirrors
5.3 Active Current Mirrors
5.3.1 Large-Signal Analysis
5.3.2 Small-Signal Analysis
5.3.3 Common-Mode Properties
6 Frequency Response of Amplifiers
6.1 General Considerations
6.1.1 Miller Effect
6.1.2 Association of Poles with Nodes
6.2 Common-Source Stage
6.3 Source Followers
6.4 Common-Gate Stage
6.5 Cascode Stage
6.6 Differential Pair
Appendix A: Dual of Miller's Theorem
7 Noise
8 Feedback
9 Operational Amplifiers
10 Stability and Frequency Compensation
11 Bandgap References
12 Introduction to Switched-Capacitor Circuits
13 Nonlinearity and Mismatch
14 Oscillators
15 Phase-Locked Loops
16 Short-Channel Effects and Device Models
17 CMOS Processing Technology
18 Layout and Packaging
Index
Preface
Acknowledgments
1 Introduction to Analog Design
1.1 Why Analog?
1.2 Why Integrated?
1.3 Why CMOS?
1.4 Why This Book?
1.5 General Concepts
1.5.1 Levels of Abstraction
1.5.2 Robust Analog Design
2 Basic MOS Device Physics
2.1 General Considerations
2.1.1 MOSFET as a Switch
2.1.2 MOSFET Structure
2.1.3 MOS Symbols
2.2 MOS I/V Characteristics
2.2.1 Threshold Voltage
2.2.2 Derivation of I/V Characteristics
2.3 Second-Order Effects
2.4 MOS Device Models
2.4.1 MOS Device Layout
2.4.2 MOS Device Capacitances
2.4.3 MOS Small-Signal Model
2.4.4 MOS SPICE models
2.4.5 NMOS versus PMOS Devices
2.4.6 Long-Channel versus Short-Channel Devices
3 Single-Stage Amplifiers
3.1 Basic Concepts
3.2 Common-Source Stage
3.2.1 Common-Source Stage with Resistive Load
3.2.2 CS Stage with Diode-Connected Load
3.2.3 CS Stage with Current-Source Load
3.2.4 CS Stage with Triode Load
3.2.5 CS Stage with Source Degeneration
3.3 Source Follower
3.4 Common-Gate Stage
3.5 Cascode Stage
3.5.1 Folded Cascode
3.6 Choice of Device Models
4 Differential Amplifiers
4.1 Single-Ended and Differential Operation
4.2 Basic Differential Pair
4.2.1 Qualitative Analysis
4.2.2 Quantitative Analysis
4.3 Common-Mode Response
4.4 Differential Pair with MOS Loads
4.5 Gilbert Cell
5 Passive and Active Current Mirrors
5.1 Basic Current Mirrors
5.2 Cascode Current Mirrors
5.3 Active Current Mirrors
5.3.1 Large-Signal Analysis
5.3.2 Small-Signal Analysis
5.3.3 Common-Mode Properties
6 Frequency Response of Amplifiers
6.1 General Considerations
6.1.1 Miller Effect
6.1.2 Association of Poles with Nodes
6.2 Common-Source Stage
6.3 Source Followers
6.4 Common-Gate Stage
6.5 Cascode Stage
6.6 Differential Pair
Appendix A: Dual of Miller's Theorem
7 Noise
8 Feedback
9 Operational Amplifiers
10 Stability and Frequency Compensation
11 Bandgap References
12 Introduction to Switched-Capacitor Circuits
13 Nonlinearity and Mismatch
14 Oscillators
15 Phase-Locked Loops
16 Short-Channel Effects and Device Models
17 CMOS Processing Technology
18 Layout and Packaging
Index
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